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CY2412 - MPEG Clock Generator

Key Features

  • Benefits.
  • Integrated phase-locked loop (PLL).
  • Low-jitter, high-accuracy outputs.
  • VCXO with analog adjust.
  • 3.3V operation.
  • 8-pin SOIC package.
  • Highest-performance PLL tailored for multimedia.

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Full PDF Text Transcription (Reference)

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CY2412 MPEG Clock Generator with VCXO Features Benefits ■ Integrated phase-locked loop (PLL) ■ Low-jitter, high-accuracy outputs ■ VCXO with analog adjust ■ 3.3V operation ■ 8-pin SOIC package ■ Highest-performance PLL tailored for multimedia applications ■ Meets critical timing requirements in complex system designs ■ Large ± 150-ppm range, better linearity ■ Enables application compatibility Part Number CY2412-1 CY2412-3 Outputs 3 3 Input Frequency Range 13.5-MHz pullable crystal input per Cypress specification 13.5-MHz pullable crystal input per Cypress specification Output Frequencies VCXO Profile Two 27 MHz outputs, one 54 MHz (3.3V) Linear 27 MHz, 13.5 MHz, 54 MHz (3.3V) Linear Logic Block Diagram 13.