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CY7C1462SV25 - 36-Mbit (1M x 36/2M x 18) Pipelined SRAM

Download the CY7C1462SV25 datasheet PDF. This datasheet also covers the CY7C1460SV25 variant, as both devices belong to the same 36-mbit (1m x 36/2m x 18) pipelined sram family and are provided as variant models within a single manufacturer datasheet.

General Description

The CY7C1460SV25/CY7C1462SV25 are 2.5 V, 1M × 36/2M × 18 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL logic, respectively.

They are designed to support unlimited true back to back Read/Write operations with no wait states.

Key Features

  • Pin compatible and functionally equivalent to ZBT™.
  • Supports 250-MHz bus operations with zero wait states.
  • Available speed grades are 250 and 167 MHz.
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
  • Fully registered (inputs and outputs) for pipelined operation.
  • Byte Write capability.
  • 2.5-V core power supply.
  • 2.5-V I/O power supply.
  • Fast clock-to-output times.
  • 2.6 ns (for 250-MHz device).
  • Clock Enabl.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1460SV25-Cypress.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C1462AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM Cypress Semiconductor
CY7C1462AV33 (CY7C146xAV33) 36-Mbit Pipelined SRAM Cypress Semiconductor
CY7C1462BV25 36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM Cypress Semiconductor
CY7C1462KV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM Cypress Semiconductor
CY7C1462KVE25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM Cypress Semiconductor

Other Datasheets by Cypress (now Infineon)

Part Number Description
CY7C1460SV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM
CY7C1006D 1-Mbit (256K x 4) Static RAM
CY7C1011G 2-Mbit (128K words x 16 bit) Static RAM
CY7C1041G 4-Mbit (256K words x 16 bit) Static RAM
CY7C1041GE 4-Mbit (256K words x 16 bit) Static RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CY7C1460SV25 CY7C1462SV25 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture 36-Mbit (1M × 36/2M × 18) Pipelined SRAM with NoBL™ Architecture Features ■ Pin compatible and functionally equivalent to ZBT™ ■ Supports 250-MHz bus operations with zero wait states ❐ Available speed grades are 250 and 167 MHz ■ Internally self-timed output buffer control to eliminate the need to use asynchronous OE ■ Fully registered (inputs and outputs) for pipelined operation ■ Byte Write capability ■ 2.5-V core power supply ■ 2.5-V I/O power supply ■ Fast clock-to-output times ❐ 2.6 ns (for 250-MHz device) ■ Clock Enable (CEN) pin to suspend operation ■ Synchronous self-timed writes ■ CY7C1460SV25 available in JEDEC-standard Pb-free 100-pin TQFP package and non Pb-free 165-ball FBGA package.