ADC-305 Description
®.
ADC-305 Key Features
- 8-bit resolution, 20MHz min. sampling rate
- ±½LSB max. differential nonlinearity error
- 18MHz input signal bandwidth
- Subranging, S&H enclosed
- +5V single power, low 85mW max. dissipation
- CMOS patible logic input
- 3-State TTL patible output
- 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA
- Tel: (508) 339-3000
- e-mail: help@datel. 30 Mar 2011 MDA_ADC-305.B02 Page 1 of 6