Overview: DFPAU
.. Floating Point Arithmetic Coprocessor ver 2.05
OVERVIEW
DFPAU is a technology independent design that can be implemented in a variety of process technologies. DFPAU is a Floating Point Arithmetic Coprocessor, designed to assist CPU in performing the floating point arithmetic putations. DFPAU directly replaces C software functions, by equivalent, very fast hardware operations, which significantly accelerate system performance. It doesn’t require any programming, so it also doesn’t require any modifications made in the main software. Everything is done automatically during software pilation by the DFPAU C driver. DFPAU was designed to operate with DCD’s DP8051, but can also operate with any other 8-, 16- and 32-bit processor. Drivers for all popular 8051 C pilers are delivered together with the DFPAU package DFPAU uses the specialized algorithms to pute arithmetic functions. It supports addition, subtraction, multiplication, division, square root, parison, absolute value, and change sign of a number. The input numbers format is according to IEEE-754 standard single precision real numbers. DFPAU is prepared to use with 8-, 16- and 32-bit processors. Trigonometric functions are supported indirectly, because they are puted as set of add, multiply and divide operations by software subroutines. Each floating point function can be turned on/off at configuration level providing the flexible scalability of DFPAU module. It allows save silicon space and provides exact configuration required by certain application.
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