74AHCT164
Description
The 74AHCT164 is a serial input 8-bit edge-triggered shift register that has outputs from each of eight stages.
Key Features
- SERIAL DATA INPUT PINS The serial input data is entered at pin SDA or pin SDB as these are logically ANDED
- Either input could be used as an active HIGH enable with data entry on the other pin
- If a single input is desired, the pins can be tied together or the unused input can be tied HIGH
- DATA ENTRY Data is shifted into Q0 from the serial input pins on each LOW to HIGH transition of the CP pin
- Also during the CP edge the data is transferred from each Qn to Qn+1
- The serial data on pins DSA and DSB must be stable before and after the CP rising edge to meet the set-up and hold timing requirements
- RESET When asserted LOW the Master Reset ( MR ) pin sets all Qn to LOW
- This action does not depend on the condition of serial input or clock pi
