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74AUP1G02 Datasheet Single 2 Input Positive Nor Gate

Manufacturer: Diodes Incorporated

Overview: 74AUP1G02 SINGLE 2 INPUT POSITIVE NOR GATE.

General Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

Pin Assignments The 74AUP1G02 is a single, two-input, positive NOR gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V.

The device is fully specified for partial power down applications using IOFF.

Key Features

  • Advanced Ultra Low Power (AUP) CMOS.
  • Supply Voltage Range from 0.8V to 3.6V.
  • ±4mA Output Drive at 3.0V.
  • Low Static Power Consumption ICC < 0.9µA.
  • Low Dynamic Power Consumption CPD = 6.4pF (Typical at 3.6V).
  • Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250 mV at Vcc = 3.0V.
  • IOFF Supports Partial-Power-Down Mode Operation.
  • ESD Protection Exce.

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