74AUP1G09 - SINGLE 2 INPUT POSITIVE AND GATE

Product Overview

Diodes

Part number	74AUP1G09
Manufacturer	DIODES
File Size	330.96 KB
Description	SINGLE 2 INPUT POSITIVE AND GATE
Datasheet	74AUP1G09 Datasheet
Additional preview pages of the 74AUP1G09 datasheet.

The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The AUP1G09 is a single AND gate with an open drain output designed for operation over a power supply range of 0.8V to 3.6V.

Advanced Ultra Low Power (AUP) CMOS.
Supply Voltage Range from 0.8V to 3.6V.
4mA Output Drive at 3.0V.
Low Static Power Consumption ICC < 0.9µA.
Low Dynamic Power Consumption CPD = 6 pF (Typical at 3.6V).
Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall time. The hysteresis is typically 250 mV at VCC = 3.0V.
IOFF Supports Partial-Power-Down Mode Operation.
ESD Protection Exceed.

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Published: Jul 25, 2015 |