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74AUP1G09 Datasheet

Manufacturer: Nexperia
74AUP1G09 datasheet preview

74AUP1G09 Details

Part number 74AUP1G09
Datasheet 74AUP1G09-nexperia.pdf
File Size 257.75 KB
Manufacturer Nexperia
Description Low-power 2-input AND gate
74AUP1G09 page 2 74AUP1G09 page 3

74AUP1G09 Overview

The 74AUP1G09 is a single 2-input AND gate with open-drain output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6.

74AUP1G09 Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V
  • CMOS low power dissipation
  • High noise immunity
  • Overvoltage tolerant inputs to 3.6 V
  • Low static power consumption; ICC = 0.9 μA (maximum)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Low noise overshoot and undershoot < 10 % of VCC
  • IOFF circuitry provides partial Power-down mode operation
  • plies with JEDEC standards
  • JESD8-12 (0.8 V to 1.3 V)

74AUP1G09 Applications

  • Wide supply voltage range from 0.8 V to 3.6 V

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