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74AUP2G126 - DUAL 3-STATE BUFFER

General Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G126 is a dual 3-State Buffer.

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N E WNPERWO PDRUOC TD U C T Description Pin Assignments 74AUP2G126 DUAL 3-STATE BUFFER The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. (Top View) The 74AUP2G126 is a dual 3-State Buffer. Each buffer has an individual output enable pin while asserted LOW will place the output in a high impedance state. The device is designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down.