74AUP2G3404 - BUFFER AND INVERTER

Product Overview

Diodes

Part number	74AUP2G3404
Manufacturer	DIODES
File Size	400.55 KB
Description	BUFFER AND INVERTER
Datasheet	74AUP2G3404 Datasheet
Additional preview pages of the 74AUP2G3404 datasheet.

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G3404 has one buffer and one inverter.

Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V.

Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power consumption.
ICC < 0.9µA CPD = 6pF Typical at 3.6V Low Dynamic Power Consumption Schmitt Trigger Action at All Inputs Make the Circuit Tolerant for Slower Input Rise and Fall Time. The hysteresis is typically 250mV at VCC = 3.0V.
IOFF Supports Partial-Power-Down Mode Operation.

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Published: Jan 23, 2014 |