74AUP2G3404 Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G3404 has one buffer and one inverter. Both gates have push-pull outputs designed for operation over a power supply range of 0.8V to 3.6V.
74AUP2G3404 Key Features
- Advanced Ultra Low Power (AUP) CMOS Supply Voltage Range from 0.8V to 3.6V ± 4mA Output Drive at 3.0V Low Static power c
- ICC < 0.9µA CPD = 6pF Typical at 3.6V Low Dynamic Power Consumption Schmitt Trigger Action at All Inputs Make the Circui
- IOFF Supports Partial-Power-Down Mode Operation
- ESD Protection per JESD 22 Exceeds 200-V Machine Model (A115) Exceeds 2000-V Human Body Model (A114-) Exceeds 1000-V Cha