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74LVC2G08 - DUAL 2-INPUT AND GATE

General Description

The 74LVC2G08 is a dual, two input AND gate.

Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V.

The device is fully specified for partial power down applications using IOFF.

Key Features

  • Wide Supply Voltage Range from 1.65 to 5.5V.
  • ± 24mA Output Drive at 3.3V.
  • CMOS low power consumption.
  • IOFF Supports Partial-Power-Down Mode Operation.
  • Inputs accept up to 5.5V.
  • Schmitt Trigger Action at all inputs makes the circuit tolerant for slower input rise and fall times. The hysteresis is typically 100mV at VCC = 3.0V.
  • ESD Protection Exceeds JESD 22.
  • 2000-V Human Body Model (A114).
  • Exceeds 1000-V Charged Device Model (C101).
  • Latch-Up Exc.

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Full PDF Text Transcription (Reference)

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NEW PRODUCT 74LVC2G08 DUAL 2-INPUT AND GATE Description Pin Assignments The 74LVC2G08 is a dual, two input AND gate. Both gates have push-pull outputs designed for operation over a power supply range of 1.65V to 5.5V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing damaging current backflow when the device is powered down. Each gate performs the positive Boolean function: Y  A B or Y  A  B (Top View) 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B GND 4 5 2A Features  Wide Supply Voltage Range from 1.65 to 5.5V  ± 24mA Output Drive at 3.3V  CMOS low power consumption  IOFF Supports Partial-Power-Down Mode Operation  Inputs accept up to 5.