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74LVC2G08 - Dual 2-input AND gate

Description

The 74LVC2G08 is a dual 2-input AND gate.

Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Features

  • Wide supply voltage range from 1.65 V to 5.5 V.
  • 5 V tolerant outputs for interfacing with 5 V logic.
  • Overvoltage tolerant inputs to 5.5 V.
  • IOFF circuitry provides partial Power-down mode operation.
  • High noise immunity.
  • ±24 mA output drive (VCC = 3.0 V).
  • CMOS low power dissipation.
  • Complies with JEDEC standard:.
  • JESD8-7 (1.65 V to 1.95 V).
  • JESD8-5 (2.3 V to 2.7 V).
  • JESD8-B/JESD36 (2.7 V to 3.6 V).

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Datasheet Details

Part number 74LVC2G08
Manufacturer nexperia
File Size 287.50 KB
Description Dual 2-input AND gate
Datasheet download datasheet 74LVC2G08 Datasheet
Additional preview pages of the 74LVC2G08 datasheet.

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74LVC2G08 Dual 2-input AND gate Rev. 18 — 23 January 2023 Product data sheet 1. General description The 74LVC2G08 is a dual 2-input AND gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 1.65 V to 5.5 V • 5 V tolerant outputs for interfacing with 5 V logic • Overvoltage tolerant inputs to 5.
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