F59L4G81XB Overview
NAND Flash devices include an asynchronous data interface for high-performance I/O operations. These devices use a highly multiplexed 8-bit bus (I/Ox) to transfer mands, address, and data. There are five control signals used to implement the asynchronous data interface:.
F59L4G81XB Key Features
- Operating voltage range VCC: 2.7-3.6V
- Open NAND Flash Interface (ONFI) 1.0-pliant1
- Single-level cell (SLC) technology
- Organization
- Asynchronous I/O performance tRC/tWC: 25ns
- Array performance Read page: 115μs (MAX) with on-die ECC enabled Read page: 25μs (MAX) with on-die ECC disabled Pr
- mand set: ONFI NAND Flash protocol
- Advanced mand set Program page cache mode Read page cache mode Permanent block locking (blocks 47:0) One-time pr
- Operation status byte provides software method for detecting Operation pletion Pass/Fail condition Write-protect s
- Ready/Busy# (R/B#) signal provides a hardware method of detecting operation pletion
