Datasheet4U Logo Datasheet4U.com

M13S5121632A Datasheet 8M x 16 Bit x 4 Banks Double Data Rate SDRAM

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

📥 Download Datasheet

General Description

Pin Name Function Pin Name Function A0~A12, BA0, BA1 Address inputs - Row address A0~A12 - Column address A0~A9 A10/AP: AUTO Precharge BA0, BA1: Bank selects (4 Banks) DM is an input mask signal for write data.

LDM, UDM LDM corresponds to the data on DQ0~DQ7;

UDM correspond to the data

Overview

ESMT M13S5121632A (2T) DDR SDRAM 8M x 16 Bit x 4 Banks Double Data Rate.

Key Features

  • Double-data-rate architecture, two data transfers per clock cycle.
  • Bi-directional data strobe (DQS).
  • Differential clock inputs (CLK and CLK ).
  • DLL aligns DQ and DQS transition with CLK transition.
  • Four bank operation.
  • CAS Latency : 2, 2.5, 3.
  • Burst Type : Sequential and Interleave.
  • Burst Length : 2, 4, 8.
  • All inputs except data & DM are sampled at the rising edge of the system clock (CLK).
  • Data I/O transitions on both edges of data strobe (DQS).

More Datasheets from ESMT (Elite Semiconductor Microelectronics Technology)

Part Number Description
M13S5121632A-5TG2T 8M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S5121632A-6TG2T 8M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4.5BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4.5TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-6BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-6TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM