M15T1G1664A-EFBG2T - 8M x 16 Bit x 8 Banks DDR3 SDRAM

10 Basic Functionality15 RESET and Initialization Procedure16 Power-up Initialization sequence16 Reset Initialization with Stable Power 18 Register Definition 19 Programming the Mode Registers19 Mode Register MR0 20 Burst Length, Type, and Order 22 CAS Latency 23 Test Mode 23 DLL Reset 23 Write Rec