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CH365 - PCI Bus Interface

Datasheet Summary

Description

4.2.

Pin No.

Features

  • l Realizes the slave device interface based on 32-bit PCI bus. l Converts into active parallel interface: 8-bit data, 16-bit address, I/O read and write, memory read and write. l Can set device identification (Vendor ID, Device ID, Class Code, etc. ) of PCI board. l Supports write and read I/O port or memory in byte, character and double characters as unit. l Test speed of no burst access can reach 7MB/s, and Read and write pulse width is selectable from 30nS to 240nS. l Distributes I/O base addr.

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Datasheet Details

Part number CH365
Manufacturer ETC
File Size 662.25 KB
Description PCI Bus Interface
Datasheet download datasheet CH365 Datasheet
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CH365 Datasheet 1 PCI Bus Interface Chip CH365 Datasheet Version: 1D http://wch.cn 1. Introduction CH365 is a general interface chip based on PCI bus, supports I/O port mapping, expansion ROM and interrupt. CH365 converts the 32-bit high-speed PCI bus into an easy-to-use 8-bit active parallel interface which is similar to ISA bus, for making low-cost computer board card based on PCI bus, and upgrading the original board card based on ISA bus onto PCI bus. Compared with other mainstream buses, PCI bus has higher speed, better real-time and controllability, so CH365 is suitable for high-speed real-time I/O control card, communication interface card, data acquisition card, electron disk and expansion ROM etc. The figure below shows its general application block diagram.
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