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CP80S56 - (CP80S54 / CP80S56) EPROM/ROM-Based 8-Bit Microcontroller Series

This page provides the datasheet information for the CP80S56, a member of the CP80S54 (CP80S54 / CP80S56) EPROM/ROM-Based 8-Bit Microcontroller Series family.

Datasheet Summary

Description

The CP80S54/S56 series is a family of low-cost, high speed, high noise immunity, EPROM/ROM-based 8-bit CMOS microcontrollers.

It employs a RISC architecture with only 42 instructions.

All instructions are single cycle except for program branches which take two cycles.

Features

  • ‧ ‧ ‧ ‧ ‧ ‧ ‧ ‧ Only 42 single word instructions All instructions are single cycle except for program branches which are two-cycle 13-bit wide instructions All ROM/EPROM area GOTO instruction All ROM/EPROM area subroutine CALL instruction 8-bit wide data path 5-level deep hardware stack Operating speed: DC-20 MHz clock input DC-100 ns instruction cycle Device CP80S54/S54E CP80S56/S56E www. DataSheet4U. com Pins # 18 18 I/O # 16 16 EPROM/ROM (Byte) 512 1K RAM (Byte) 49 49 ‧ ‧ ‧ ‧ ‧ ‧ ‧ ‧ ‧ ‧ ‧.

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Datasheet preview – CP80S56

Datasheet Details

Part number CP80S56
Manufacturer ETC
File Size 500.05 KB
Description (CP80S54 / CP80S56) EPROM/ROM-Based 8-Bit Microcontroller Series
Datasheet download datasheet CP80S56 Datasheet
Additional preview pages of the CP80S56 datasheet.

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Full PDF Text Transcription

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CP80S54/56 EPROM/ROM-Based 8-Bit Microcontroller Series Devices Included in this Data Sheet: ‧ CP80S54E/S56E : EPROM devices ‧ CP80S54/S56 : Mask ROM devices FEATURES ‧ ‧ ‧ ‧ ‧ ‧ ‧ ‧ Only 42 single word instructions All instructions are single cycle except for program branches which are two-cycle 13-bit wide instructions All ROM/EPROM area GOTO instruction All ROM/EPROM area subroutine CALL instruction 8-bit wide data path 5-level deep hardware stack Operating speed: DC-20 MHz clock input DC-100 ns instruction cycle Device CP80S54/S54E CP80S56/S56E www.DataSheet4U.
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