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CS18LV02565 - HIGH SPEED SUPER LOW POWER SRAM

General Description

The CS18LV02565 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 32,768 words by 8bits and operates for a single 4.5 to 5.5V supply voltage.

Key Features

  • and maximum access time of 55/70ns in 5.0V operation. Easy memory expansion is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE). The CS18LV02565 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The CS18LV02565 is available in JEDEC standard 28-pin TSOP I (8x13.4 mm), SOP (330 mil) and PDIP (600 mil) packages.

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Datasheet Details

Part number CS18LV02565
Manufacturer Unknown Manufacturer
File Size 294.07 KB
Description HIGH SPEED SUPER LOW POWER SRAM
Datasheet download datasheet CS18LV02565 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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High Speed Super Low Power SRAM 32K-Word By 8 Bit CS18LV02565 Revision History Rev. No. 2.0 History Initial issue with new naming rule Issue Date Dec.29,2004 Remark 1 Rev. 2.0 Chiplus reserves the right to change product or specification without notice. High Speed Super Low Power SRAM 32K-Word By 8 Bit CS18LV02565 GENERAL DESCRIPTION The CS18LV02565 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 32,768 words by 8bits and operates for a single 4.5 to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed, super low power features and maximum access time of 55/70ns in 5.0V operation. Easy memory expansion is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE).