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EDI88128P - 128K X 8 STATIC RAM CMOS MONOLITHIC

Key Features

  • The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. The device is also available as EDI88130C with an additional chip select line (CS2) which will automatically power down the device when proper logic levels are applied. The second chip select line (CS2) can be used to provide system memory security during power down in non-battery backed up systems and simplifiy decoding schemes in memory banking where large multiple pages of memory are required. Th.

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Datasheet Details

Part number EDI88128P
Manufacturer Unknown Manufacturer
File Size 153.47 KB
Description 128K X 8 STATIC RAM CMOS MONOLITHIC
Datasheet download datasheet EDI88128P Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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EDI88128C 128KX8 MONOLITHIC SRAM, SMD 5962-89598 n Access Times of 70, 85, 100ns n Available with Single Chip Selects (EDI88128) or Dual Chip Selects (EDI88130) n 2V Data Retention (LP Versions) n CS and OE Functions for Bus Control n TTL Compatible Inputs and Outputs n Fully Static, No Clocks n Organized as 128Kx8 n Industrial, Military and Commercial Temperature Ranges n Thru-hole and Surface Mount Packages JEDEC Pinout • 32 pin Ceramic DIP, 0.6 mils wide (Package 9) • 32 lead Ceramic SOJ (Package 140) n Single +5V (±10%) Supply Operation FEATURES The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8.