Description
I/O0-7 A0-16 WE CS1, CS2
29 28 27 26 25 24 23 22 21
TOP VIEW
A12 A14 A16 NC VCC A15 CS2
Data Inputs/Outputs Address Inputs Write Enable Chip Selects Output Enable Power (+5V ±10%) Ground Not Connected
TOP VIEW
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 AØ I/OØ I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13
Features
- s Access Times of 15.
- , 17, 20, 25, 35, 45, 55ns s Battery Back-up Operation.
- 2V Data Retention (EDI88130LPS) s CS1, CS2 & OE Functions for Bus Control s Inputs and Outputs Directly TTL Compatible s Organized as 128Kx8 s Commercial, Industrial and Military Temperature Ranges s Thru-hole and Surface Mount Packages JEDEC Pinout.
- 32 pin Sidebrazed Ceramic DIP, 400 mil (Package 102) 32 pin Sidebrazed Ceramic DIP, 600 mil (Package.