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PA7540 Datasheet

Pa7540 Peel Array Programmable Electrically Erasable Logic

Manufacturer: Unknown Manufacturer

This datasheet includes multiple variants, all published together in a single manufacturer document.

Datasheet Details

Part number PA7540
Manufacturer Unknown Manufacturer
File Size 239.25 KB
Description PA7540 PEEL Array Programmable Electrically Erasable Logic
Datasheet PA7540 PA7 Datasheet (PDF)

PA7540 Overview

The PA7540 is a member of the Programmable Electrically Erasable Logic (PEEL™) Array family based on ICT’s CMOS EEPROM technology. PEEL™ Arrays free designers from the limitations of ordinary PLDs by providing the architectural flexibility and speed needed for today’s programmable logic designs. The PA7540 is by far the most powerful 24-pin PLD available today with 20 I/O pins, 2 input/global-clocks and 40...

PA7540 Key Features

  • Independent or global clocks, resets, presets, clock polarity and output enables
  • Sum-of-products logic for output enables Development and Programmer Support
  • Anachip’s WinPLACE Development Software
  • Fitters for ABEL, CUPL and other software
  • Programming support by popular third-party programmers presets, clock polarity, and other features, making the PA7540 su

PA7540 Distributor