Datasheet4U Logo Datasheet4U.com

UT54ACTS74 - Radiation-Hardened Dual D Flip-Flops

Datasheet Summary

Description

The UT54ACS74 and the UT54ACTS74 contain two independent D-type positive triggered flip-flops.

A low level at the Preset or Clear inputs sets or resets the outputs regardless of the levels of the other inputs.

Features

  • radiation-hardened CMOS - Latchup immune.
  • High speed.
  • Low power consumption www. DataSheet4U. com.
  • Single 5 volt supply.
  • Available QML Q or V processes.
  • Flexible package - 14-pin DIP - 14-lead flatpack.

📥 Download Datasheet

Datasheet preview – UT54ACTS74

Datasheet Details

Part number UT54ACTS74
Manufacturer ETC
File Size 67.82 KB
Description Radiation-Hardened Dual D Flip-Flops
Datasheet download datasheet UT54ACTS74 Datasheet
Additional preview pages of the UT54ACTS74 datasheet.

📁 Similar Datasheet

  • UT54ACTS74 - Dual D Flip-Flops (Aeroflex Circuit Technology)
  • UT54ACTS74E - Dual D Flip-Flops (Aeroflex Circuit Technology)
  • UT54ACTS00 - Quadruple 2-Input NAND Gates (Aeroflex Circuit Technology)
  • UT54ACTS00E - Quadruple 2-Input NAND Gates (Aeroflex Circuit Technology)
  • UT54ACTS02 - Quadruple 2-Input NOR Gates (Aeroflex Circuit Technology)
  • UT54ACTS02E - Quadruple 2-Input NOR Gate (Aeroflex Circuit Technology)
  • UT54ACTS04 - Hex Inverters (Aeroflex Circuit Technology)
  • UT54ACTS04E - Hex Inverters (Aeroflex Circuit Technology)
  • UT54ACTS08 - Quadruple 2-Input AND Gates (Cobham)
  • UT54ACTS08 - Quadruple 2-Input AND Gates (Aeroflex Circuit Technology)
Other Datasheets by ETC

Full PDF Text Transcription

Click to expand full text
UT54ACS74/UT54ACTS74 Radiation-Hardened Dual D Flip-Flops with Clear & Preset FEATURES radiation-hardened CMOS - Latchup immune • High speed • Low power consumption www.DataSheet4U.com • Single 5 volt supply • Available QML Q or V processes • Flexible package - 14-pin DIP - 14-lead flatpack DESCRIPTION The UT54ACS74 and the UT54ACTS74 contain two independent D-type positive triggered flip-flops. A low level at the Preset or Clear inputs sets or resets the outputs regardless of the levels of the other inputs. When Preset and Clear are inactive (high), data at the D input meeting the setup time requirement is transferred to the outputs on the positive-going edge of the clock pulse.
Published: |