EBE21UE8AEFB - 2GB Unbuffered DDR2 SDRAM DIMM

Description

Pin name A0 to A13 A10 (AP) BA0, BA1, BA2 DQ0 to DQ63 /RAS /CAS /WE /CS0, /CS1 CKE0, CKE1 CK0 to CK2 /CK0 to /CK2 DQS0 to DQS7, /DQS0 to /DQS7 DM0 to DM7 SCL SDA SA0 to SA2 VDD VDDSPD VREF VSS ODT0, ODT1 NC Function Address input Row address Column address Auto precharge Bank select address Data inp

Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

Elpida Memory

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Datasheet Details

Part number	EBE21UE8AEFB
Manufacturer	Elpida Memory
File Size	284.28 KB
Description	2GB Unbuffered DDR2 SDRAM DIMM
Datasheet	EBE21UE8AEFB Datasheet
Additional preview pages of the EBE21UE8AEFB datasheet.

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Full PDF Text Transcription

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PRELIMINARY DATA SHEET www.DataSheet4U.com 2GB Unbuffered DDR2 SDRAM DIMM EBE21UE8AEFB (256M words × 64 bits, 2 Ranks) Specifications • Density: 2GB • Organization  256M words × 64 bits, 2 ranks • Mounting 16 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory module (DIMM)  PCB height: 30.0mm  Lead pitch: 1.0mm  Lead-free (RoHS compliant) (EBE21UE8AEFB-xx-E)  Lead-free (RoHS compliant) and Halogen-free (EBE21UE8AEFB-xx-F) • Power supply: VDD = 1.8V ± 0.1V • Data rate: 800Mbps/667Mbps (max.

Published: Mar 21, 2010 |