EBE21UE8AESA - 2GB DDR2 SDRAM SO-DIMM

Description

Pin name A0 to A13 A10 (AP) BA0, BA1, BA2 DQ0 to DQ63 /RAS /CAS /WE /CS0, /CS1 CKE0, CKE1 CK0, CK1 /CK0, /CK1 DQS0 to DQS7, /DQS0 to /DQS7 DM0 to DM7 SCL SDA SA0, SA1 VDD VDDSPD VREF VSS ODT0, ODT1 NC Function Address input Row address Column address Auto precharge Bank select address Data input/out

Features

Double-data-rate architecture; two data transfers per clock cycle.
The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture.
Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the receiver.
DQS is edge-aligned with data for READs; centeraligned with data for WRITEs.
Differential clock inputs (CK and /CK).
DLL aligns DQ and DQS transitions with CK transi.

Elpida Memory

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Datasheet Details

Part number	EBE21UE8AESA
Manufacturer	Elpida Memory
File Size	297.19 KB
Description	2GB DDR2 SDRAM SO-DIMM
Datasheet	EBE21UE8AESA Datasheet
Additional preview pages of the EBE21UE8AESA datasheet.

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Full PDF Text Transcription

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DATA SHEET www.DataSheet4U.com 2GB DDR2 SDRAM SO-DIMM EBE21UE8AESA (256M words × 64 bits, 2 Ranks) Specifications • Density: 2GB • Organization  256M words × 64 bits, 2 ranks • Mounting 16 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 200-pin socket type small outline dual in line memory module (SO-DIMM)  PCB height: 30.0mm  Lead pitch: 0.6mm  Lead-free (RoHS compliant) (EBE21UE8AESA-xx-E)  Lead-free (RoHS compliant) and Halogen-free (EBE21UE8AESA-xx-F) • Power supply: VDD = 1.8V ± 0.1V • Data rate: 800Mbps/667Mbps (max.

Published: Mar 21, 2010 |