HB52RD648DC-B Datasheet | Elpida Memory

Description The HB52RF648DC, HB52RD648DC are a 32M × 64 × 2 banks Synchronous Dynamic RAM Small Outline Dual In-line Memory Module (S.O.DIMM), mounted 16 pieces of 256-Mbit SDRAM (HM5225805BTB) sealed in TCP package and 1 piece of serial EEPROM (2-kbit) for Presence Detect (PD). An outline of the products is 144-pin Zig Zag Dual tabs socket type pact and thin package. Therefore, they make high density mounting possible without surface mount technology. They provide mon data inputs and outputs. Decoupling capacitors are mounted beside TCP on the module board. Note: Do not push the cover or drop the modules in order to protect from mechanical defects, which would be electrical defects. Features - Fully patible with: JEDEC standard outline 8-byte S.O.DIMM - 144-pin Zig Zag Dual tabs socket type (dual lead out)  Outline: 67.60 mm (Length) × 31.75 mm (Height) × 3.80 mm (Thickness)  Lead pitch: 0.80 mm - 3.3 V power supply - Clock frequency: 133/100 MHz (max) - LVTTL interface - Data bus width: × 64 Non parity - Single pulsed RAS - 4 Banks can operates simultaneously and independently - Burst read/write operation and burst read/single write operation capability - Programmable burst length : 1/2/4/8 Elpida Memory, Inc. is a joint venture DRAM pany of NEC Corporation and Hitachi, Ltd. HB52RF648DC-B, HB52RD648DC-B - 2 variations of burst sequence  Sequential  Interleave - Programmable CE latency: 2/3 - Byte control by DQMB - Refresh cycles: 8192 refresh cycles/64 ms - 2 variations of refresh  Auto refresh  Self refresh - Low self refresh current: HB52RF648DC-xx BL (L-version) : HB52RD648DC-xx BL (L-version) Ordering Information Type No. HB52RF648DC-75B- HB52RF648DC-75BL- 1 HB52RD648DC-A6B- 1 HB52RD648DC-A6BL- 1 HB52RD648DC-B6B- 2 HB52RD648DC-B6BL- 2 Frequency 133 MHz 133 MHz 100 MHz 100 MHz 100 MHz 100 MHz CE latency 3 3 2/3 2/3 3 3 Package Contact pad Small outline DIMM (144-pin) Gold Notes: 1. 100 MHz operation at CE latency = 2. 2. 66 MHz operation at CE...