- Process Technology : 0.15µm Full CMOS - Organization :256K x8 - Power Supply Voltage => EM620FV8B : 2.7~3.6V - Low Data Retention Voltage : 1.5V - Three state output and TTL Compatible - Packaged product designed for 45/55/70ns GENERAL PHYSICAL SPECIFICATIONS - Backside die surface of polished bare silicon - Typical Die Thickness = 725um +/-15um - Typical top-level metallization : => Metal (Ti/AlCu/TiN/ARC SiON/SiO2) : 5.2K Angstroms - Topside Passivation : => Passivation (HDP/pNIT/PIQ) : 5.4K Angstroms - Wafer diameter : 8 inch OPTIONS - C1/W1 : DC Probed Die/Wafer @ Hot Temp - C2/W2 : DC/AC Probed Die/Wafer @ Hot Temp 1 56 29 EM620FV8B (Dual C/S) + (0.0) EMLSI LOGO 28 y x Pre-charge Circuit PAD DESCRIPTIONS Name CS1,CS2 OE WE A0~A17 I/O0~I/O7 Function Chip select inputs Output Enable input Write Enable input Address Inputs Data Inputs/Outputs Name Vcc Vss NC Function Power Supply Ground No Connection A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 VCC Row Select VSS Memory Array 1024 x 2048...
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