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eorex
EM488M1644LBA
128Mb (2M×4Bank×16) Synchronous DRAM
Features
• Fully Synchronous to Positive Clock Edge • VDD/VDDQ= 1.8V +/- 0.1V Power Supply • LVTTL Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8
or Full Page • Programmable CAS Latency (C/L) – 1,2,3 • Data Mask (DQM) for Read / Write Masking • Programmable Wrap Sequence
– Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) • Burst Read with Single-bit Write Operation • All Inputs are Sampled at the Rising Edge of the System Clock • Auto Refresh and Self Refresh • Auto Temperature Compensated Self Refresh • Partial Array Self Refresh • Power Down Mode • Deep Power Down Mode • Programmable output buffer driver strength • 4,096 Refresh Cycles / 64ms (15.