S1L50000 - HIGH DENSITY GATE ARRAY

Product Overview

Epson

Datasheet Details

Part number	S1L50000
Manufacturer	Epson
File Size	121.68 KB
Description	HIGH DENSITY GATE ARRAY
Datasheet	S1L50000 Datasheet
Additional preview pages of the S1L50000 datasheet.

Product details

Description

EPSON Electronics America, Inc.’s S1L50000 Series is a family of ultra high-speed VLSI CMOS gate array utilizing a 0.35µm “sea-of-gates” architecture. Ultra-high-speed, high density and low power consumption Low voltage operation: 3.3V and 2.0V Number of raw gates: 28,710 ~ 815,468 gates

Features

Process Integration Operating Speed 0.35µm 2/3/4 layer metalization CMOS process A maximum of 815,468 gates (2 input NAND gate equivalent) Internal gates: 140 ps (3.3V Typ), 210 ps (2.0V Typ) (2-input pair NAND, F/O = 2, Typical wire load) Input buffer: 380 ps (5.0V Typ) Built-in level shifter is used. 400 ps (3.3V Typ), 1.30 ns (2.0V Typ) (F/O = 2, Typical wire load) Output buffer: 2.12 ns (5.0V Typ) Built-in level shifter is used. 2.02 ns (3.3 V Typ), 3.90 ns (2.

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Published: Feb 15, 2007 |