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SLA4239 - (SLA40000 Series) High Density Gate Array

This page provides the datasheet information for the SLA4239, a member of the SLA40000 (SLA40000 Series) High Density Gate Array family.

Datasheet Summary

Features

  • q q q q q Super-high density (adopting 0.45µm silicon gate CMOS with 2- and 3-metal layers) High-speed operation (operation delay of internal gate = 0.160ns at 3.3V, 2-input power NAND standard) Internal gate = 3.3 and 3.0V (2.0V single), I/O buffer = 5.0, 3.3 and 3.0V (2.0V single) (built-in level shifter) Low power consumption (0.80µW/MHz/BC when internal cell = 3.0V) Output drivability (IOL = 100µ, 1, 3, 6, 12, 24 mA when PCI = 5.0V, IOL = 100µ, 1, 2, 6, 12mA when PCI = 3.3V, IOL = 50µ, 300µ,.

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Datasheet Details

Part number SLA4239
Manufacturer Epson
File Size 58.68 KB
Description (SLA40000 Series) High Density Gate Array
Datasheet download datasheet SLA4239 Datasheet
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Full PDF Text Transcription

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PF842-02 SLA40000 Series High Density Gate Array q Super-high-density/speed gate array q Operates on 3.3 and 3.0V power source (level shifter is pre-installed) q Raw of gates: 28 to 411k gates (sea of gates) s OVERVIEW The SLA 40000 series are super-high-density/speed, Sea-of-gate type CMOS gate arrays adopting the 0.45É m process. They consume less electricity, a feature of ASICs dedicated to 3.3V, while enabling high-speed-operation as well as 3V/5V full swing I/F in the level shifter. There are 2- and 3-metal layer for each of 8 models from 28,260 to 411,257 gates, satisfying customer needs for a wide range of circuit size. In addition, the series can be used with various I/F devices such as low noise output cells, PCI I/F revision 2.
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