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EMB09P03V Datasheet P-channel Logic Level Enhancement Mode Field Effect Transistor

Manufacturer: Excelliance MOS

Overview: EMB09P03V Single P-Channel Logic Level Enhancement Mode Field Effect Transistor ▪Product Summary: ▪.

Datasheet Details

Part number EMB09P03V
Manufacturer Excelliance MOS
File Size 356.84 KB
Description P-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet EMB09P03V-ExcellianceMOS.pdf

General Description

: BVDSS RDSON (MAX.)@VGS=-10V RDSON (MAX.)@VGS=-4.5V ID @TC=25℃ ID @TA=25℃ P-CH -30V 9.5mΩ 18mΩ -57A -12A Single P Channel MOSFET UIS, Rg 100% Tested RoHS & Halogen Free & TSCA pliant ▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Gate-Source Voltage Continuous Drain Current1 TC = 25 °C TC = 100 °C Continuous Drain Current1 Pulsed Drain Current1 Avalanche Current1 Avalanche Energy1 Repetitive Avalanche Energy2 TA = 25 °C TA = 70 °C L = 0.1mH L = 0.05mH Power Dissipation1 Power Dissipation1 TC = 25 °C TC = 100 °C TA = 25 °C TA = 70 °C Operating Junction & Storage Temperature Range VGS ID ID IDM IAS EAS EAR PD PD Tj, Tstg ±25 -57 -36 -12 -9 -144 -25 31.25 15.625 48.1 19.2 2.2 1.4 -55 to 150 ▪100% UIS testing in condition of VD=25V, L=0.1mH, VG=10V, IL=15A,RG=25Ω, Rated VDS=-30V P-CH ▪THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM Junction-to-Case RθJC 2.6 Junction-to-Ambient3 t≦10s Steady-State RθJA RθJA 25 57 1Pulse width limited by maximum junction temperature.

2Duty cycle ≦ 1% 3The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz.

Copper, in a still air environment with TA =25°C.

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