EMD08N10E Datasheet | Excelliance MOS

N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 100V RDSON (MAX.) 7.5mΩ 130A UIS, Rg 100% Tested Pb‐Free Lead Plating ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.1m H, ID=90A, RG=25Ω L = 0.05m H Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range VGS ID IDM IAS EAS EAR PD Tj, Tstg ±30 130 93 540 90 405 202 227 90 ‐55 to 150 100% UIS testing in condition of VD=50V, L=0.1m H, VG=10V, IL=60A, Rated VDS=100V N-CH THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM Junction‐to‐Case RJC Junction‐to‐Ambient RJA...