EMF04P02V - P-Channel Logic Level Enhancement Mode Field Effect Transistor

Excelliance MOS

Datasheet Details

Part number	EMF04P02V
Manufacturer	Excelliance MOS
File Size	867.40 KB
Description	P-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet	EMF04P02V Datasheet
Additional preview pages of the EMF04P02V datasheet.

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Full PDF Text Transcription

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P-Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS -20V RDSON (MAX.) 6.3mΩ ID -46A P-Channel MOSFET UIS, Rg 100% Tested Pb-Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Gate-Source Voltage VGS ±12 Continuous Drain Current TC = 25 °C -46 ID TA = 25 °C -16 Pulsed Drain Current1 TC = 100 °C -29 IDM -180 Avalanche Current IAS -48 Avalanche Energy L = 0.1mH, IAS=-48A, RG=25Ω EAS 115 Repetitive Avalanche Energy2 L = 0.05mH EAR 57 Power Dissipation TC = 25 °C TC = 100 °C 21 PD 8.3 Power Dissipation TA = 25 °C TA = 100 °C Operating Junction & Storage Temperature Range PD Tj, Tstg 2.

Published: Jun 23, 2024 |