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N‐Channel Logic Level Enhancement Mode Field Effect Transistor
Product Summary:
BVDSS
30V
D
RDSON (MAX.)
50mΩ
ID 2.2A G
S
Pb‐Free Lead Plating & Halogen Free
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Gate‐Source Voltage
Continuous Drain Current Pulsed Drain Current1
TA = 25 °C TA = 70 °C
Power Dissipation
TA = 25 °C TA = 70 °C
Operating Junction & Storage Temperature Range
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
VGS ID IDM PD Tj, Tstg
TYPICAL
Junction‐to‐Ambient
RJA
Junction‐to‐Lead
RJL
1Pulse width limited by maximum junction temperature. 2Duty cycle 1％
2013/3/15
EMF50N03M
LIMITS ±12 2.2 1.65 14 0.29 0.
EMF50N03M Datasheet
