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I S 3403 ST
AUG .16.2005
P -C hannel E nhancement Mode MOS FE T
P R ODUC T S UMMAR Y
V DS S ID
-3A
F E AT UR E S
( m W ) Max
R DS (ON)
S uper high dense cell design for low R DS (ON ).
65 @ V G S = -10V 80 @ V G S = -4.5V
R ugged and reliable. S OT-23 P ackage.
D
-30V
S OT-23
D S G
G
S
ABS OLUTE MAXIMUM R ATINGS (T A=25 C unless otherwise noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ T J =25 C b -P ulsed Drain-S ource Diode Forward C urrent a Maximum P ower Dissipation a Operating Junction and S torage Temperature R ange S ymbol V DS V GS ID IDM IS PD T J , T S TG Limit - 30 20 -3 - 10 -1.25 1.
IS3403 Datasheet
