Datasheet Summary
74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop
March 2007
74AC109, 74ACT109 Dual JK Positive Edge-Triggered Flip-Flop
Features
- ICC reduced by 50%
- Outputs source/sink 24mA
- ACT109 has TTL-patible inputs tm
General Description
The AC/ACT109 consists of two high-speed pletely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecting the J and K inputs together. Asynchronous Inputs:
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- - LOW input to SD (Set) sets Q to HIGH level LOW input to CD (Clear) sets Q to LOW level Clear and Set are...