• Part: 74LS112A
  • Description: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop
  • Manufacturer: Fairchild Semiconductor
  • Size: 52.01 KB
74LS112A Datasheet (PDF) Download
Fairchild Semiconductor
74LS112A

Description

This device contains two independent negative-edge-triggered J-K flip-flops with plementary outputs. The J and K data is processed by the flip-flop on the falling edge of the clock pulse.