Datasheet4U Logo Datasheet4U.com

74LS193 - Synchronous 4-Bit Binary Counter

General Description

The DM74LS193 circuit is a synchronous up/down 4-bit binary counter.

Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs change together when so instructed by the steering logic.

Key Features

  • s Fully independent clear input s Synchronous operation s Cascading circuitry provided internally s Individual preset each flip-flop Ordering Code: Order Number DM74LS193M DM74LS193N Package Number M16A N16E Package.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74LS193 SYNCHRONOUS 4-BIT UP/DOWN COUNTER Texas Instruments
74LS193 Synchronous Up/Down 4-bit Binary Counters Hitachi Semiconductor
74LS193 PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER Motorola
74LS190 PRESETTABLE BCD/DECADE UP/DOWN COUNTERS Motorola
74LS190 Synchronous Up/Down Decade Counters Hitachi Semiconductor

Other Datasheets by Fairchild (now onsemi)

Part Number Description
74LS191 Synchronous 4-Bit Up/Down Counter
74LS194 4-Bit Bidirectional Universal Shift Register
74LS194A 4-Bit Bidirectional Universal Shift Register
74LS10 Triple 3-Input NAND Gate
74LS11 Triple 3-Input AND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock September 1986 Revised March 2000 DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock General Description The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs change together when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (rippleclock) counters. The outputs of the four master-slave flip-flops are triggered by a LOW-to-HIGH level transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is held HIGH.