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74LVQ273 - Low Voltage Octal D-Type Flip-Flop

Datasheet Summary

Description

The LVQ273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs.

The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

The register is fully edge-triggered.

Features

  • n Ideal for low power/low noise 3.3V.

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Datasheet Details

Part number 74LVQ273
Manufacturer Fairchild Semiconductor
File Size 89.30 KB
Description Low Voltage Octal D-Type Flip-Flop
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74LVQ273 Low Voltage Octal D-Type Flip-Flop April 1998 74LVQ273 Low Voltage Octal D-Type Flip-Flop General Description The LVQ273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.
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