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74VCX16500 - Low Voltage 18-Bit Universal Bus Transceivers

Description

The VCX16500 is an 18-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Features

  • s 1.65V.
  • 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD (A to B, B to A) 2.9 ns max for 3.0V to 3.6V VCC 3.5 ns max for 2.3V to 2.7V VCC 7.0 ns max for 1.65V to 1.95V VCC s Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s Static Drive (IOH/IOL) ±24 mA @ 3.0V VCC ±18 mA @ 2.3V VCC ±6 mA @ 1.65V VCC s Uses patented noise/EMI reduction circuitry s Latchup performance exceeds 300 mA The VCX16500 is designed for low voltage (1.65.

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Datasheet Details

Part number 74VCX16500
Manufacturer Fairchild Semiconductor
File Size 86.55 KB
Description Low Voltage 18-Bit Universal Bus Transceivers
Datasheet download datasheet 74VCX16500 Datasheet
Additional preview pages of the 74VCX16500 datasheet.

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Full PDF Text Transcription

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74VCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs March 1998 Revised April 1999 74VCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description The VCX16500 is an 18-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level.
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