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74VCX16827 Datasheet PDF

Fairchild Semiconductor 74VCX16827

The 74VCX16827 is designed for low voltage (1.2V to 3.6V) VCC applications with I/O capability up to 3.6V. The 74VCX16827 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. Logic Symbol Pin Descriptions Pin Names OEn I0–I19 O0–O19 Description Output Enable Input (Active LOW) Inputs Outputs © 2002 Fairchild Semiconductor Corporation DS500131 74VCX16827 Connection Diagram Truth Tables Inputs OE1 L L H X OE2 L L X H Inputs OE3 L L H X OE4 L L X H I0–I9 L H X X I0–I9 L H...
Part No. 74VCX16827
Datasheet 74VCX16827 Download
Manufacturer
Fairchild Semiconductor
Description Low Voltage 20-Bit Buffer/Line Driver
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74VCX16827 datasheet page 1 preview

GENERAL DESCRIPTION

The VCX16827 contains twenty non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver carrying parity. The device is byte controlled. Each byte has NOR output enables for maximum control flexibility.

FEATURES

s 1.2V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD 2.5 ns max for 3.0V to 3.6V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal (Note 1) s Static Drive (IOH/IOL) ±24 mA @ 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number 74VCX16827MTD Package Number MTD56 Package

DESCRIPTION

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available on Tape and Reel.
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