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74VCX16835 - Low Voltage 18-Bit Universal Bus Driver

Datasheet Summary

Description

The VCX16835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes.

Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs.

Features

  • s Compatible with PC100 DIMM module specifications s 1.65V.
  • 3.6V VCC specifications provided s 3.6V tolerant inputs and outputs s tPD (CP to On) 4.2ns max for 3.0V to 3.6V VCC 5.2ns max for 2.3V to 2.7V VCC 9.2ns max for 1.65V to 1.95V VCC s Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s Static Drive (IOH/IOL) ±24mA @ 3.0V ±18mA @ 2.3V ±6mA @ 1.65V s Latchup performance exceeds 300 mA s ESD performance: Human body model > 2000V Machine model >.

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Datasheet Details

Part number 74VCX16835
Manufacturer Fairchild Semiconductor
File Size 101.80 KB
Description Low Voltage 18-Bit Universal Bus Driver
Datasheet download datasheet 74VCX16835 Datasheet
Additional preview pages of the 74VCX16835 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com 74VCX16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs October 1998 Revised April 2000 74VCX16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs General Description The VCX16835 low voltage 18-bit universal bus driver combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow is controlled by output-enable (OE), latch-enable (LE), and clock (CLK) inputs. The device operates in Transparent Mode when LE is held HIGH. The device operates in clocked mode when LE is LOW and CLK is toggled. Data transfers from the Inputs (In) to Ouputs (O n) on a Positive Edge Transition of the Clock. When OE is LOW, the output data is enabled.
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