Datasheet4U Logo Datasheet4U.com

74VHC139 - Dual 2-to-4 Decoder/Demultiplexer

General Description

The VHC139 is an advanced high speed CMOS Dual 2-to4 Decoder/Demultiplexer fabricated with silicon gate CMOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Key Features

  • s High Speed: tPD = 5.0 ns (typ) at TA = 25°C s Low power dissipation: ICC = 4 µA (Max. ) at TA = 25°C s High noise immunity: VNIH = VNIL = 28% VCC (Min. ) s Power down protection is provided on all inputs s Pin and function compatible with 74HC139 Ordering Code: Order Number 74VHC139M 74VHC139SJ 74VHC139MTC 74VHC139N Package Number Package.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74VHC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER STMicroelectronics
74VHC132 QUAD 2-INPUT SCHMITT NAND GATE STMicroelectronics
74VHC132 Quad 2-Input NAND Schmitt Trigger National Semiconductor
74VHC138 3 TO 8 LINE DECODER STMicroelectronics
74VHC138FT 3-to-8 Line Decoder Toshiba

Other Datasheets by Fairchild (now onsemi)

Part Number Description
74VHC132 Quad 2-Input NAND Schmitt Trigger
74VHC138 3-to-8 Decoder/Demultiplexer
74VHC112 Dual J-K Flip-Flops
74VHC123A Dual Retriggerable Monostable Multivibrator
74VHC125 Quad Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74VHC139 Dual 2-to-4 Decoder/Demultiplexer November 1992 Revised April 1999 74VHC139 Dual 2-to-4 Decoder/Demultiplexer General Description The VHC139 is an advanced high speed CMOS Dual 2-to4 Decoder/Demultiplexer fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The active LOW enable input can be used for gating or it can be used as a data input for demultiplexing applications. When the enable input is held HIGH, all four outputs are fixed at a HIGH logic level independent of the other inputs. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply volt- age.