Datasheet4U Logo Datasheet4U.com

74VHC373 - Octal D-Type Latch

Description

The VHC373 is an advanced high speed CMOS octal D-type latch with 3-STATE output fabricated with silicon gate CMOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Features

  • High Speed: tPD = 5.0ns (typ) @ VCC = 5V.
  • High Noise Immunity: VNIH = VNIL = 28% VCC (Min. ).
  • Power Down Protection is provided on all inputs.
  • Low Noise: VOLP = 0.6V (Typ. ).
  • Low Power Dissipation: ICC = 4µA (Max) @ TA = 25°C.
  • Pin and Function Compatible with 74HC373 General.

📥 Download Datasheet

Datasheet preview – 74VHC373

Datasheet Details

Part number 74VHC373
Manufacturer Fairchild Semiconductor
File Size 232.84 KB
Description Octal D-Type Latch
Datasheet download datasheet 74VHC373 Datasheet
Additional preview pages of the 74VHC373 datasheet.

📁 Similar Datasheet

  • 74VHC373 - OCTAL D-TYPE LATCH (STMicroelectronics)
  • 74VHC374 - Octal D-Type Flip-Flop (STMicroelectronics)
  • 74VHC32 - QUAD 2-INPUT OR GATE (STMicroelectronics)
  • 74VHC32 - Quad 2-Input OR Gate (Motorola)
  • 74VHC32 - Quad 2-Input OR Gate (ON Semiconductor)
  • 74VHC32 - Quad 2-input OR gate (nexperia)
  • 74VHC32-Q100 - Quad 2-input OR gate (nexperia)
  • 74VHC393FT - Dual Binary Counter (Toshiba)
  • 74VHC00 - QUAD 2-INPUT NAND GATE (STMicroelectronics)
  • 74VHC02 - QUAD 2-INPUT NOR GATE (STMicroelectronics)
Other Datasheets by Fairchild Semiconductor

Full PDF Text Transcription

Click to expand full text
74VHC373 Octal D-Type Latch with 3-STATE Outputs 74VHC373 Octal D-Type Latch with 3-STATE Outputs April 2007 tm Features ■ High Speed: tPD = 5.0ns (typ) @ VCC = 5V ■ High Noise Immunity: VNIH = VNIL = 28% VCC (Min.) ■ Power Down Protection is provided on all inputs ■ Low Noise: VOLP = 0.6V (Typ.) ■ Low Power Dissipation: ICC = 4µA (Max) @ TA = 25°C ■ Pin and Function Compatible with 74HC373 General Description The VHC373 is an advanced high speed CMOS octal D-type latch with 3-STATE output fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type latch is controlled by a latch enable input (LE) and an output enable input (OE).
Published: |