FDG6304P Description
These dual P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETs.
FDG6304P Key Features
- 6 or 3
- The pinouts are symmetrical; pin 1 and 4 are interchangeable