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FIN1001 - 3.3V LVDS 1-Bit High Speed Differential Driver

Download the FIN1001 datasheet PDF. This datasheet also covers the FIN variant, as both devices belong to the same 3.3v lvds 1-bit high speed differential driver family and are provided as variant models within a single manufacturer datasheet.

General Description

This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology.

Key Features

  • I Greater than 600Mbs data rate I 3.3V power supply operation I 0.5ns maximum differential pulse skew I 1.5ns maximum propagation delay I Low power dissipation I Power-Off protection I Meets or exceeds the TIA/EIA-644 LVDS standard I Flow-through pinout simplifies PCB layout I 5-Lead SOT23 package saves space Ordering Code: Order Number FIN1001M5 FIN1001M5X Package Number MA05B MA05B Package.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (FIN-1001.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver December 2001 Revised January 2002 FIN1001 3.3V LVDS 1-Bit High Speed Differential Driver General Description This single driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350 mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data. The FIN1001 can be paired with its companion receiver, the FIN1002, or with any other LVDS receiver. Features I Greater than 600Mbs data rate I 3.3V power supply operation I 0.5ns maximum differential pulse skew I 1.