FM24C32U Datasheet | Fairchild Semiconductor

Description FM24C32U is a 32Kbit CMOS non-volatile serial EEPROM organized as 4K x 8 bit memory. This device confirms to Extended IIC 2-wire protocol that allows accessing of memory in excess of 16Kbit on an IIC bus. This serial munication protocol uses a Clock signal (SCL) and a Data signal (SDA) to synchronously clock data between a master (e.g. a microcontroller) and a slave (EEPROM). FM24C32U is designed to minimize pin count and simplify PC board layout requirements. FM24C32U offers hardware write protection where by the upper half (upper 16Kbit) of the memory array can be write protected by connecting WP pin to VCC. This section of memory then bees unalterable until the WP pin is switched to VSS. “LZ” and “L” versions of FM24C32U offer very low standby current making them suitable for low power applications. This device is offered in both SO and DIP packages. Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption. Features I Extended operating voltage: 2.7V to 5.5V I Up to 400 KHz clock frequency at 2.7V to 5.5V I Low power consumption - 0.2m A active current typical - 10µA standby current typical - 1µA standby current typical (L version) - 0.1µA standby current typical (LZ version) I Schmitt trigger inputs I 32 byte page write mode I Self timed write cycle (6ms typical) I Hardware Write Protection for upper half of the array I Low VCC programming lockout for VCC = 5V± 10% (“H” option) - Internal ERASE/WRITE logic is disabled if VCC is below 3.8V I Endurance: 1 Million data changes I Data Retention: Greater than 40 years I Packages: 8-Pin DIP and 8-Pin SO I Temperature range - mercial: 0°C to +70°C - Industrial (V): -40°C to +85°C - Automotive (E): -40°C to +125°C Block Diagram VSS VCC WP SDA START STOP LOGIC CONTROL LOGIC SLAVE ADDRESS REGISTER & PARATOR E2PROM ARRAY WRITE LOCKOUT H.V. GENERATION TIMING &CONTROL XDEC A2 A1 A0 WORD ADDRESS COUNTER R/W YDEC CK DIN DATA...