FQAF47P06 Datasheet | Fairchild Semiconductor

Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and mutation modes. These devices are well suited for low voltage applications such as automotive, DC/DC converters, and high efficiency switching for power management in portable and battery operated products. Features - - - - - - - -38A, -60V, RDS(on) = 0.026Ω @VGS = -10 V Low gate charge ( typical 84 n C) Low Crss ( typical 320 p F) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating ! - - G! ▶ ▲ - G D S TO-3PF FQAF Series ! Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Drain Current - Pulsed (Note 1) FQAF47P06 -60 -38 -26.8 -152 ± 25 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V m J A m J V/ns W W/°C °C °C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) 820 -38 10 -7.0 100 0.67 -55 to +175 300 - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Typ --Max 1.5 40 Units °C/W °C/W ©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001 Elerical Characteristics Symbol Parameter TC = 25°C unless otherwise noted Test...