Description
These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
Features
- -5.3A, -60V, RDS(on) = 0.41Ω @VGS = -10 V Low gate charge ( typical 6.3 nC) Low Crss ( typical 25 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating
S
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- GD S
TO-220F
FQPF Series
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D
Absolute Maximum Ratings
Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL
TC = 25°C unless otherwise noted
Parameter Drain-Source Voltage - Continu.