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SCANPSC110F - SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port

General Description

The SCANPSC110F Bridge extends the IEEE Std.

1149.1 test bus into a multidrop test bus environment.

The advantage of a hierarchical approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules.

Key Features

  • s True IEEE1149.1 hierarchical and multidrop addressable capability s The 6 slot inputs support up to 59 unique addresses, a Broadcast Address, and 4 Multi-cast Group Addresses s 3 IEEE 1149.1-compatible configurable local scan ports s Mode Register allows local TAPs to be bypassed, selected for insertion into the scan chain individually, or serially in groups of two or three s 32-bit TCK counter s 16-bit LFSR Signature Compactor s L4 s local TAPs can be 3-stated via the OE input to allow an alt.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) March 1993 Revised August 2000 SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) General Description The SCANPSC110F Bridge extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a hierarchical approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANPSC110F Bridge supports up to 3 local scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs.