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SCANPSC110F - SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port

This page provides the datasheet information for the SCANPSC110F, a member of the SCANPSC110 SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port family.

Description

The SCANPSC110F Bridge extends the IEEE Std.

1149.1 test bus into a multidrop test bus environment.

The advantage of a hierarchical approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules.

Features

  • not described in this datasheet such as 8 slot inputs for enhanced address capability and additional instructions. For a completed.

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Datasheet Details

Part number SCANPSC110F
Manufacturer National Semiconductor
File Size 459.90 KB
Description SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port
Datasheet download datasheet SCANPSC110F Datasheet
Additional preview pages of the SCANPSC110F datasheet.

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Full PDF Text Transcription

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SCANPSC110F SCAN Bridge October 1999 SCANPSC110F SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) General Description The SCANPSC110F Bridge extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a hierarchical approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANPSC110F Bridge supports up to 3 local scan rings which can be accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs.
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